74AC11 Datasheet | STMicroelectronics

..net TRIPLE 3-INPUT AND GATE PRELIMINARY DATA s s s s s s s s s HIGH SPEED: tPD = 4 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION PATIBLE WITH 74 SERIES 11 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC11B 74AC11M wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar...