DESCRIPTION
protection circuits against static discharge, giving sub-micron silicon gate and double-layer metal s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 86 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC86B 74AC86M PIN CONNECTION AND IEC LOGIC SYMBOLS April 1997 1/7 74AC86 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND F UNCTIO N Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L L H H B L H L H Y L H H L ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Volta...