DESCRIPTION
The designer has a choise of select combination of inverting and non-inverting outputs, symmetrical G (active low output control) input, and PIN CONNECTION (top view) HC240 HC241 HC244 . . . . . . . . B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R complementary G and G inputs. Each control input governs four BUS BUFFERs. These devices are designed to be used with 3 state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1993 1/12 M54/M74HC240/241/244 CHIP CARRIER HC240 HC241 HC244 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
(HC240) PIN No 1 2, 4, 6, 8 9, 7, 5, 3 11, 13, 15, 17 18, 16, 14, 12 19 10 20 SYMBOL 1G 1A1 to 1A4 2Y1 to 2Y4 2A1 to 2A4 1Y1 to 1Y4 2G GND VCC NAME AND FUNCTION Output Enable Input Data Inputs Data Outputs Data Inputs Data Outputs Output Enabel Input Ground (0V...