Datasheet4U Logo Datasheet4U.com

74LCX86 - Low voltage CMOS quad Exclusive OR gate

General Description

The 74LCX86 is a low voltage CMOS quad Exclusive OR gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs.

Key Features

  • 5V tolerant inputs.
  • High speed:.
  • tPD = 6.5ns (Max) at VCC = 3V ).
  • Power down protection on inputs and outputs t(s.
  • Symmetrical output impedance: uc.
  • |IOH| = IOL = 24mA (Min) at VCC = 3V d.
  • PCI bus levels guaranteed at 24mA ro.
  • Balanced propagation delays: P.
  • tPLH ≅ tPHL te.
  • Operating voltage range: ole.
  • VCC (Opr) = 2.0V to 3.6V s.
  • Pin and function compatible with b74 series 86 O.
  • Latch-up performance exceeds ) -500mA (JES.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LCX86 Low voltage CMOS quad Exclusive OR gate with 5V tolerant inputs Features ■ 5V tolerant inputs ■ High speed: – tPD = 6.5ns (Max) at VCC = 3V )■ Power down protection on inputs and outputs t(s■ Symmetrical output impedance: uc– |IOH| = IOL = 24mA (Min) at VCC = 3V d■ PCI bus levels guaranteed at 24mA ro■ Balanced propagation delays: P– tPLH ≅ tPHL te■ Operating voltage range: ole– VCC (Opr) = 2.0V to 3.6V s■ Pin and function compatible with b74 series 86 O■ Latch-up performance exceeds ) -500mA (JESD 17) t(s■ ESD performance: c– HBM > 2000V Obsolete Produ(MIL STD 883 method 3015); MM > 200V SO-14 TSSOP14 Description The 74LCX86 is a low voltage CMOS quad Exclusive OR gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.