Datasheet Details
| Part number | 74LVQ573 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 75.13 KB |
| Description | OCTAL D-TYPE LATCH |
| Datasheet | 74LVQ573_STMicroelectronics.pdf |
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Overview: ® 74LVQ573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.5 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ573M 74LVQ573T input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely. When the LE is taken low, the Q outputs will be latched precisely at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
| Part number | 74LVQ573 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 75.13 KB |
| Description | OCTAL D-TYPE LATCH |
| Datasheet | 74LVQ573_STMicroelectronics.pdf |
|
|
|
The LVQ573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
It is ideal for low power and low noise 3.3V applications.
These 8 bit D-Type flip-flops are controlled by a latch enable input (LE) and an output enable PIN CONNECTION AND IEC LOGIC SYMBOLS February 1999 1/10 74LVQ573 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 12, 13, 14, 15, 16, 17, 18, 19 11 10 20 SYMBOL OE D0 to D7 NAME AND FUNCT ION 3 State Output Enable Input (Active LOW) Data Inputs Q0 to Q7 3 State Latch Outputs LE GND VCC Latch Enable Input Ground (0V) Posi
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| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74LVQ573 | Low Voltage Octal Latch | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| 74LVQ574 | OCTAL D-TYPE FLIP FLOP |
| 74LVQ00 | QUAD 2-INPUT NAND GATE |
| 74LVQ02 | QUAD 2-INPUT NOR GATE |
| 74LVQ04 | HEX INVERTER |
| 74LVQ08 | QUAD 2-INPUT AND GATE |
| 74LVQ125 | QUAD BUS BUFFERS 3-STATE |
| 74LVQ138 | 3 TO 8 LINE DECODER INVERTING |
| 74LVQ14 | HEX SCHMITT INVERTER |
| 74LVQ157 | LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER |
| 74LVQ161 | SYNCHRONOUS PRESETTABLE 4-BIT COUNTER |