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74LVQ573 - OCTAL D-TYPE LATCH

Datasheet Summary

Description

The LVQ573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is ideal for low power and low noise 3.3V applications.

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Datasheet Details

Part number 74LVQ573
Manufacturer STMicroelectronics
File Size 75.13 KB
Description OCTAL D-TYPE LATCH
Datasheet download datasheet 74LVQ573 Datasheet
Additional preview pages of the 74LVQ573 datasheet.

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Full PDF Text Transcription

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® 74LVQ573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.5 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ573M 74LVQ573T input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely.
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