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74V1T00
SINGLE 2-INPUT NAND GATE
s s
s
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HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY
S (SOT23-5L)
C (SC-70)
ORDER CODE: 74V1T00S 74V1T00C The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
74V1T00 Datasheet
