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74V2G00 - DUAL 2-INPUT NAND GATE

General Description

wiring C2MOS technology.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

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® 74V2G00 DUAL 2-INPUT NAND GATE s s s s s s s s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES PACKAGE SOT23-8L T UBE T& R 74V2G00STR DESCRIPTION The 74V2G00 is an advanced high-speed CMOS DUAL 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.