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74VHC174 - HEX D-TYPE FLIP FLOP WITH CLEAR

General Description

The 74VHC174 is an advanced high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

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® 74VHC174 HEX D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: fMAX =175 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHC174M 74VHC174T transfered to the Q outputs on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independently of the other inputs.