DESCRIPTION
Any nG output control governs two 10-bit BUS SWITCHES. Output Enable inputs (nG) tied together gives full 20-bit operations. When nG is LOW, the switches are on. When nG is HIGH, the switches are in high impedance state. It has ultra high-speed performance at 5V near zero delay with low ON resistance. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. October 2004 Rev. 1 1/10 This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice. B5S16861 Figure 2: Input Equivalent Circuit w w w . D a t a S h e e Table 2: Pin DESCRIPTION
PIN N° 1, 13 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 34, 33, 32, 31, 30, 29, 28, 27, 26, 25 46, 45, 44, 43, 42, 41, 40, 39, 38, 37 47, 35 12, 24 36, 48 SYMBOL NC NAME QND FUNCTION Not Connected Figure 3: Schematic Diagram 1A0 to 1A9 Data Inputs 2A0 to...