EF6805U2 Datasheet | STMicroelectronics

EF6805U3 8-BIT MICROPUTER UNIT - - - - . . HARDWARE Features 32 TTL/CMOS PATIBLE I/O LINES 24 BIDIRECTIONAL (8 lines are LED patible) 8 INPUT-ONLY 3776 BYTES OF USER ROM 112 BYTES OF RAM SELF-CHECK MODE ZERO-CROSSING DETECT/INTERRUPT INTERNAL 8-BIT TIMER WITH 7-BIT SOFTWARE PROGRAMMABLE PRESCALER AND CLOCK SOURCE 5V SINGLE SUPPLY SOFTWARE Features 10 POWERFUL ADDRESSING MODES BYTE EFFICIENT INSTRUCTION SET WITH TRUE BIT MANIPULATION, BIT TEST, AND BRANCH INSTRUCTIONS SINGLE INSTRUCTION MEMORY EXAMINE/CHANGE POWERFUL INDEXED ADDRESSING FOR TABLES FULL SET OF CONDITIONAL BRANCHES MEMORY USABLE AS REGISTER/FLAGS PLETE DEVELOPMENT SYSTEM SUPPORT ON INICE USER SELECTABLE OPTIONS 8 BIDIRECTIONAL I/O LINES WITH TTL OR TTL/CMOS INTERFACE OPTION 8 BIDIRECTIONAL I/O LINES WITH TTL OR OPEN-DRAIN INTERFACE OPTION CRYSTAL OR LOW-COST RESISTOR OSCILLATOR OPTION LOW VOLTAGE INHIBIT OPTION VECTORED INTERRUPTS : TIMER, SOFTWARE, AND EXTERNAL USER CALLABLE SELF-CHECK SUBROUTINES DESCRIPTION The EF6805U3 Microputer Unit (MCU) is a member of the 6805 Family of low-cost single-chip Microputers. The 8-bit microputer contains a CPU, on-chip CLOCK, ROM, RAM, I/O, and TIMER. It is designed for the user who needs an economical microputer with the proven capabilities of the 6800-based instruction set. A parison of the key Features of several members of the 6805 Family of Microputers is shown at the end of this data sheet. The following are some of the hardware and software highlights of the EF6805U3 MCU. P (PDIP40) FN (PLCC 44) PIN CONNECTIONS March 1989 1/31 EF6805U3 Figure 1 : EF6805U3 HMOS Microputer Block...