HCC4033B Datasheet PDF | STMicroelectronics

STMicroelectronics HCC4033B

The HCC4026B/4033B (extended temperature range) and HCF4026B/4033B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4026B and HCC/HCF4033B each consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display. These devices are particularly advantageous in display applications where low power dissipation and/or low package count are important.

Part No.	HCC4033B
Datasheet	HCC4033B Download
Manufacturer	STMicroelectronics
Description	7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED
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DESCRIPTION

OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Frit Seal Package) M1 (Micro Package) C1 (Plastic Chip Carrier) ORDER CODES : HCC40XXBF HCF40XXBM1 HCF40XXBEY HCF40XXBC1 PIN CONNECTIONS

DESCRIPTION

Inputs common to both types are CLOCK, RESET, & CLOCK INHIBIT ; common outputs are CARRY OUT and the seven decoded outputs (a, b, c, d, e, f, g). Additional inputs and outputs for the HCC/HCF4026B include DISPLAY ENABLE input and DISPLAY ENABLE and UNGATED ”CSEGMENT” outputs. Signals peculiar to the HCC/HCF4033B are RIPPLE-BLANKING INPUT AND LAMP TEST INPUT and a RIPPLE-BLANKING OUTPUT. A high RESET signal clears the deJune 1989 4026B 4033B 1/15 HCC/HCF4026B/4033B cade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence.