DESCRIPTION
OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Package) M1 (Micro Package) C1 (Chip Carrier) ORDER CODES : HCC4029BF HCF4029BM1 HCF4029BEY HCF4029BC1 DESCRIPTION
The inputs consist of a single CLOCK, CARRY-IN (CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as outputs. A high PRESET ENABLE signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the PRESET-ENABLE signal is high, resets the counter to its zero count. The counter is advanced one count at the positive transition of the clock when the CARRY-IN and PRESET ENABLE signals, are low. Advancement is inhibited when the CARRY-IN or PRESET ENABLE signals are high. The CARRYOUT signal is normally high and goes low when the PIN CONNECTIONS NC = No Internal Connection September 1988 1/13 HCC/HCF4029B counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN signal is low.