STMicroelectronics IIS2DULPX
The IIS2DULPX is an intelligent, digital 3-axis linear accelerometer whose MEMS and ASIC have been expressly designed to combine the lowest supply current possible with features such as always-on antialiasing filtering, a finite state machine (FSM) and machine learning core (MLC) with adaptive self-configuration (ASC), and an analog hub / Qvar sensing channel. The FSM and MLC with ASC deliver outstanding always-on, edge processing capabilities to the IIS2DULPX, while the analog hub / Qvar sensing channel defines a new degree of system optimization. The IIS2DULPX MIPI I3C® target interface and embedded 128-level FIFO buffer complete a set of features that make this accelerometer a reference in terms of system integration from a standpoint of the bill of materials, processing, or power consumption.
STMicroelectronics
