STMicroelectronics LF351
The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.FEATURES
● Internally adjustable input offset voltage● Low power consumption
● Wide common-mode (up to VCC+) and differential voltage range
● Low input bias and offset current
● Output short-circuit protection
● High input impedance JFET input stage
● Internal frequency compensation
● Latch up free operation
● High slew rate 16 V/µs (typical)
DESCRIPTION
These circuits are high speed JFET input single operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit. N DIP8 (Plastic package) D SO-8 (Plastic micro package) Pin connections (top view) 18 27 36 45 1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C. April 2008 Rev 2 1/14 14 Schematics 1 Schematics Figure 1. Schematic diagram VCC Non-inverting input Inverting input 100W 200W 100W 30k Output 1.3k 35k 1.3k 35k 100W VCC Offset Null1 Offset Null2 8.2k Figure 2. Input offset voltage null circuit LF351 2/14 LF351 2 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1.