DESCRIPTION
The pin-out is compatible with the most common 8 Mbit Mask ROM. The FDIP42W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written rapidly to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C800 is offered in PDIP42, PLCC44 and SO44 packages. Figure 1. Logic Diagram VCC 19 A0-A18 15 Q15A–1 Q0-Q14 E G BYTEVPP M27C800 VSS AI01593 January 2000 1/17 M27C800 Figure 2A. DIP Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 42 1 41 2 40 3 39 4 38 5 37 6 36 7 35 8 34 9 33 10 M27C800 32 11 31 12 30 13 29 14 28 15 27 16 17 26 18 25 19 24 20 23 21 22 AI01594 Figure 2B. LCC Connections NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A–1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 A5 A6 A7 A17 A18 VSS NC A8 A9 A10 A11 1 44 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A–1 Q7 Q14 Q6 12 M27C800 34 23 Q9 Q2 Q10 Q3 Q11 NC VCC Q4 Q12 Q5 Q13 AI02042 Figure 2C.
STMicroelectronics
