STMicroelectronics M48Z129V
1 Mbit (128 Kb x 8) ZEROPOWER SRAM
FEATURES
● Integrated, ultra low power SRAM, power-fail control circuit, and battery● Conventional SRAM operation; unlimited )WRITE cycles t(s● 10 years of data retention in the absence of cpower du● Microprocessor power-on reset (reset valid roeven during battery backup mode) P● Battery low pin - provides warning of battery end-of-life lete● Automatic power-fail chip deselect and WRITE protection so● WRITE protect voltages Ob– VCC = 3.0 to 3.6 V; 2.7 V ≤ VPFD ≤ 3.0 V -(VPFD = power-fail deselect voltage) )● Self-contained battery in the CAPHAT™ DIP t(spackage c● Pin and function compatible with JEDEC ustandard 128 K x 8 SRAMs rod● RoHS compliant Obsolete P– Lead-free second level interconnect 32 1 PMDIP32 module September 2011 Doc ID 5716 Rev 8 This is information on a product still in production but not recommended for new designs. 1/20 1 Contents