M54HC137 Datasheet PDF | STMicroelectronics

STMicroelectronics M54HC137

The M54/74HC137 is a high speed CMOS 3 TO 8LINE DECODER/LATCH (INVERTING) fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device is a 3 to 8line decoder withlatches on thethree address inputs.

Part No.	M54HC137
Datasheet	M54HC137 Download
Manufacturer	STMicroelectronics
Description	3 TO 8 LINE DECODER/LATCH INVERTING
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DESCRIPTION

When GL goes from low tohigh, theaddress present at theselect inputs (A, B and C) is stored in the latches. As long as GL remains high no address changes will be recognized. Output enable pins G1 and G2, control the state of the outputs independently of the select or latch-enable inputs. All the outputs are high unless G1 is high and G2 is low. The HC137 is ideally suited for the implementation of glitch-free decoders in stored-address applications in bus oriented systems. All inputs are equipped withprotection circuits against staticdischarge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection February 1993 1/11 M54/M74HC137 TRUTH TABLE INPUTS GL X X L L L L L L L L H ENABLE G1 X L H H H H H H H H H G2 H X L L L L L L L L L C X X L L L L H H H H X SELECT B X X L L H H L L H H X A X X L H L H L H L H X Y0 H H L H H H H H H H Y1 H H H L H H H H H Y2 H H H H L H H H H OUTPUTS Y3 H H H H H L H H H Y4 H H H H...