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M54HC280 Datasheet PDF

STMicroelectronics M54HC280

The M54/74HC280 is a high speed CMOS 9-BIT PARITY GENERATOR fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low consumption. It is composed of nine data inputs (A to I) and odd/even parity outputs (Σ ODD and Σ EVEN).
Part No. M54HC280
Datasheet M54HC280 Download
Manufacturer
STMicroelectronics
Description 9 BIT PARITY GENERATOR
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M54HC280 datasheet page 1 preview

DESCRIPTION

The nine data inputs control the output conditions. When the number of high level inputs is odd, ΣODD output is kept high and ΣEVEN output low. Conversely, when the number is even , ΣEVEN output is kept high and ΣODD low. This IC generates either odd or even parity making it flexible application. The word-length capability is easily expanded by cascading. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1992 NC = No Internal Connection 1/10 M54/M74HC280 INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE NUMBER OF INPUTS A THRU I THAT ARE HIGH 0, 2, 4, 6, 8 1, 3, 5, 7, 9 OUTPUT Σ EVEN H L Σ ODD L H LOGIC DIAGRAM 2/10 M54/M74HC280 PIN

DESCRIPTION

PIN No 5, 6 8, 9, 10, 11, 12, 13, 1, 2, 4 3 7 14 SYMBOL Σ EVEN, Σ ODD A to I NAME AND FUNCTION Parity Outputs Data Inputs IEC LOGIC SYMBOL NC GND V CC No Connection Ground (0V) Positive Supply Voltage

ABSOLUTE MAXIMUM RATINGS

Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg T...
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