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M54HC75 Datasheet PDF

STMicroelectronics M54HC75

The M54HC75 is an high speed CMOS 4 BIT D TYPE LATCH fabricated with silicon gate C2MOS technology. It contains two groups of 2 bit latches controlled by an enable input (G1•2 or G3•4). These two latch groups can be used in different circuits.
Part No. M54HC75
Datasheet M54HC75 Download
Manufacturer
STMicroelectronics
Description 4 BIT D TYPE LATCH
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M54HC75 datasheet page 1 preview

DESCRIPTION

Each latch has Q and Q outputs (1Q - 4Q and 1Q - 4Q). The data applied to the data input is transferred to the Q and Q outputs when the enable input is taken high and the outputs will follow the data input as long as the enable input is kept high. When the enable input is taken low, the information data applied to the data input is retained at the outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION June 2004 Rev. 1 1/10 M54HC75 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 1: Pin

DESCRIPTION

PIN N° 1, 14, 11, 8 2, 3, 6, 7 4 13 16, 15, 10, 9 12 5 SYMBOL 1Q to 4Q 1D to 4D G3
● 4 G1
● 2 1Q to 4Q GND VCC NAME AND FUNCTION Complementary Latch Outputs Data Inputs Latch Enable Input, latches 3 and 4 Latch Enable Input, latches 1 and 2 Latch Outputs Ground (0V) Positive Supply Voltage Table 2: Truth Table INPUTS D L H X G H H L OUTPUTS FUNCTION Q L H Qn Q H L Qn LATCH 2/10...
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