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M54HC77 Datasheet PDF

STMicroelectronics M54HC77

The M54/74HC77 is a high speed CMOS 4-BIT DTYPE LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. It contains two groups of 2-bit latches controlled by an enable input (G1 • 2 or G3 • 4).
Part No. M54HC77
Datasheet M54HC77 Download
Manufacturer
STMicroelectronics
Description 4-BIT D-TYPE LATCH
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M54HC77 datasheet page 1 preview

DESCRIPTION

These two latch groups can be used in different circuits. The data applied to the data inputs (1D, 2D, or 3D, 4D) are transfered to the Q outputs (1Q, 2Q, or 3Q, 4Q) respectively when the enable input (G1
● 2 or G3
● 4) is taken high. The Q outputs will follow the data inputs as long as the enable input is kept high. When the enable input is taken low, the information data applied to the data inputs is retained at the Q outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection October 1992 1/10 M54/M74HC77 TRUTH TABLE INPUTS D L H X X: Don’t Care IEC LOGIC SYMBOL OUTPUTS FUNCTION G H H L Q L H Qn LATCH PIN

DESCRIPTION

PIN No 1, 2, 5, 6 3 7, 10 8, 9, 13, 14 12 11 4 SYMBOL 1D to 4D G3
● 4 NC 1Q to 4Q G1
● 2 GND V CC NAME AND FUNCTION Data Inputs Latch Enable Input, Latches 3 and 4 No Internal Connection Latch Outputs Latch Enable In...
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