M54HCT640 Datasheet PDF | STMicroelectronics

STMicroelectronics M54HCT640

The M54/74HCT245, HCT640 and HCT643 utilise silicon gate C2MOS technology to achive operating speeds eqivalent to LSTTL devices. These IC’s are intended for two-way asynchronous communication between data buses, and the direction of data trasmission is determined by DIR input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.

Part No.	M54HCT640
Datasheet	M54HCT640 Download
Manufacturer	STMicroelectronics
Description	Octal Bus Transceiver
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DESCRIPTION

Along with the low power dissipation and high noise immunity of standad CMOS integrated circuit, it possesses the capability to drive 15 LSTTL loads. All input are equipped with protection circuits against static discharge and transient discharge. These integrated circuits have input and output PIN CONNECTION (top view) HCT245 HCT640 ORDER CODES : M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1R characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. IT IS PROHIBITED TO APPLY A SIGNAL TO A BUS TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS THERMINAL IS FLOATING (HIGH IMPEDANCE STATE), IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR. HCT643 October 1993 1/11 M54/M74HCT245/640/643 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN...