FEATURES
SUMMARY s SUPPLY VOLTAGE – VDD = 1.65V to 2V for Program, Erase and Read – VDDQ = 1.65V to 3.3V for I/O Buffers s Figure 1. Packages – VPP = 12V for fast Program (optional) SYNCHRONOUS / ASYNCHRONOUS READ – Burst mode Read: 54MHz – Page mode Read (4 Words Page) – Random Access: 85, 100, 120 ns FBGA s PROGRAMMING TIME – 10µs by Word typical – Double/Quadruple Word programming option TFBGA56 (ZB) 6.5 x 10 mm s MEMORY BLOCKS – Dual Bank Memory Array: 8/24 Mbit – Parameter Blocks (Top or Bottom location) s DUAL OPERATIONS – Read in one Bank while Program or Erase in other – No delay between Read and Write operations s ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M58CR032C: 88C8h – Bottom Device Code, M58CR032D: 88C9h s BLOCK LOCKING – All blocks locked at Power up – Any combination of blocks can be locked – WP for Block Lock-Down s SECURITY – 64 bit user programmable OTP cells – 64 bit unique device identifier – One parameter block permanently lockable s s COMMON FLASH INTERFACE (CFI) 100,000 PROGRAM/ERASE CYCLES per BLOCK September 2002 Details are subject to change without notice.
STMicroelectronics
