M58LR256GL Datasheet | STMicroelectronics

Feature summary - Supply voltage - VDD = 1.7V to 2.0V for program, erase and read - VDDQ = 1.7V to 2.0V for I/O Buffers - VPP = 9V for fast program Multiplexed address/data Synchronous / Asynchronous Read - Synchronous Burst Read mode: 66MHz - Random Access: 85ns (M58LR128GU/L) 90ns (M58LR256GU/L) Synchronous Burst Read Suspend Programming time - 10µs typical Word program time using Buffer Enhanced Factory Program mand Memory organization - Multiple Bank Memory Array: 16 Mbit (M58LR256GU/L) or 8 Mbit (M58LR128GU/L) Banks - Parameter Blocks (Top or Bottom location) Dual operations - program/erase in one Bank while read in others - No delay between read and write operations Block locking - All blocks locked at power-up - Any bination of blocks can be locked with zero latency - WP for Block Lock-Down - Absolute Write Protection with VPP = VSS Security - 64 bit unique device number - 2112 bit user programmable OTP Cells mon Flash Interface (CFI) - - FBGA - - VFBGA44 (ZC) 8 x 10mm VFBGA44 (ZB) 7.7 x 9mm - - 100,000 program/erase cycles per block Electronic signature - Manufacturer Code: 20h - Top Device Codes: M58LR256GU: 882Ch M58LR128GU: 882Eh - Bottom Device Codes M58LR256GL: 882Dh M58LR128GL: 882Fh ECOPACK® packages available - - - - - - June 2006 Rev 1 1/114 .st. 1 .. Contents M58LR256GU, M58LR256GL, M58LR128GU, M58LR128GL Contents 1 2 Summary description -...