STMicroelectronics M68Z512
The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible.
| Part No. |
M68Z512 |
| Datasheet |
M68Z512
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| Manufacturer |
 STMicroelectronics |
| Description |
4 Mbit 512Kb x8 Low Power SRAM with Output Enable |
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DESCRIPTION
This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68Z512 is available in a 32 lead TSOP II (10 x 20mm) package. Table 1. Signal Names A0-A18 DQ0-DQ7 E G W VCC VSS Address Inputs VCC 19 A0-A18 8 DQ0-DQ7 W E G M68Z512 Data Input/Output Chip Enable Output Enable Write Enable Supply Voltage Ground VSS AI03030 March 2000 1/12 M68Z512 Table 2. ABSOLUTE MAXIMUM RATINGS
(1) Symbol TA TSTG VIO (2) VCC IO (3) PD Parameter Ambient Operating Temperature Storage Temperature Input or Output Voltage Supply Voltage Output Current Power Dissipation Value 0 to 70 –65 to 150 –0.3 to VCC + 0.3 –0.3 to 7.0 20 1 Unit °C °C V V mA W Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "ABSOLUTE MAXIMUM RATINGS
" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied.
