DESCRIPTION
These circuits are controlled by the signals WORD SELECT and CLOCK. When the WORD SELECT input is taken low Word 1 (A1, B1, C1 and D1) is presented to the input of the flip-flops, and when WORD SELECT is high Word 2 (A2, B2, C2 and D2) is presented to the inputs of the flip-flops. The select word is clocked to the output terminals on the negative edge of the clock pulse. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HC298F1R M74HC298M1R M74HC298B1R M74HC298C1R PIN CONNECTIONS (top view) NC = No Internal Connection October 1992 1/11 M54/M74HC298 TRUTH TABLE INPUTS WORD SELECT L H X CLOCK QA a1 a2 QA0 QB b1 b2 QB0 OUTPUTS QC c1 c2 QC0 QD d1 d2 QD0 X : DON’T CARE (INCLUDING TRANSITION) a1, a2, ETC : THE LEVEL OF STEAY STATE INPUT AT a1, a2, etc. QA0, QB0, ETC : THE LEVEL OF QA, QB, ETC ENTERED ON THE MOST RECENT NEGATIVE TRANSITION OF THE CLOCK INPUT. LOGIC DIAGRAM 2/...
STMicroelectronics
