DESCRIPTION
All six buffers are controlled by the combination of two enable inputs (G1 and G2) ; all outputs of these buffers are enabled only when both G1 and G2 inputs are held low, under all other conditions these output are disabled to be high-impedance. These outputs are capable of driving up to 15 LSTTL loads. The designer has a choice of non-inverting outputs (HC365) and inverting outputs (HC366). All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1992 1/11 HC366 M54/M74HC365/366 INPUT AND OUTPUT EQUIVALENT CIRCUIT CHIP CARRIER HC365 HC366 NC = No Internal Connection TRUTH TABLE INPUTS G1 L L H X G2 L L X H An L H X X Y (365) L H Z Z OUTPUTS Y (366) H L Z Z X = DON’T CARE Z = HIGH IMPEDANCE PIN DESCRIPTION
(HC365) PIN No 1, 15 2, 4, 6, 10, 12, 14 3, 5, 7, 9, 11, 13 8 16 SYMBOL G1, G2 1A to 6A 1Y to 6Y GND V CC NAME AND FUNCTION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage PIN DESCRI...
STMicroelectronics
