DESCRIPTION
This counter circuit contains independent ripple carry counters and two 4-bit ripple carry binary counters, which can be cascated to create a single divide by 256 counter. Each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input,and each has an independent clear input. When clear is set to high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide by N counter configurations. This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1993 NC = No Internal Connection PIN CONNECTIONS (top view) 1/12 M54/M74...
STMicroelectronics
