M95040-R Overview
1 Description The M95010/M95020/M95040 devices (M950x0) are electrically erasable programmable memories (EEPROMs) organized as 128/256/512 x 8 bits respectively, accessed through the SPI bus. The identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode. Logic diagram VCC D C S M95xxx Q W HOLD VSS The SPI bus signals are C, D and Q, as shown in...
M95040-R Key Features
- patible with the serial peripheral interface (SPI) bus
- Memory array
- 1/2/4-Kbit (128/256/512 bytes) of EEPROM
- Page size: 16 bytes
- Additional write lockable page (Identification page) for M95040-DF order
- Byte Write within 5 ms
- Page Write within 5 ms
- Write protect
- quarter array
- half array
