M95640-R Overview
1 The M95640 devices are electrically erasable programmable memories (EEPROMs) organized as 8192 x 8 bits, accessed through the SPI bus. Figure 2. 8-pin package connections (top view) Memory organization 2 Memory organization The memory is organized as shown in the following figure. Figure 4. SPI block diagram _ HOLD Data register + ECC Status register Control logic Sense amplifiers Page latches Custom area* HV generator + Sequencer X Decoder Address Register *: Identification page DS6633 - Rev 20 page 4/
M95640-R Key Features
- patible with the serial peripheral interface (SPI) bus
- 64 Kb (8 Kbytes) of EEPROM
- Page size: 32 bytes
- Additional write lockable page (identification page)
- Wide single supply voltage
- 2.5 V to 5.5 V for M95640-W
- 1.8 V to 5.5 V for M95640-R
- 1.7 V to 5.5 V for M95640-DF
- Operating temperature range: from -40 °C up to +85 °C
- Byte and page write within 5 ms
