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PSD4135G2
Flash In-System-Programmable Peripherals for 16-Bit MCUs
PRELIMINARY DATA
FEATURES SUMMARY s 5 V±10% Single Supply Voltage: s Up to 4 Mbit of Primary Flash Memory (8
uniform sectors) s 256Kbit Secondary Flash Memory (4 uniform
sectors) s Up to 64 Kbit SRAM s Over 3,000 Gates of PLD: DPLD and CPLD s 52 Reconfigurable I/O ports s Enhanced JTAG Serial Port s Programmable power management s High Endurance:
– 100,000 Erase/Write Cycles of Flash Memory – 1,000 Erase/Write Cycles of PLD
Figure 1. Packages
TQFP80 (U)
January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.