FEATURES
SUMMARY PSD provides an integrated solution to 16-bit MCU-based applications that includes configurable memories, PLD logic, and I/O: s Dual bank Flash memories – 8Mbits of Primary Flash Memory (16 uniform sectors, 64Kbyte) – 512Kbits of Secondary Flash Memory with 4 sectors – Concurrent operation: READ from one memory while erasing and writing the other s s s High Endurance: – 100,000 Erase/WRITE Cycles of Flash Memory – 1,000 Erase/WRITE Cycles of PLD – 15 Year Data Retention s Single Supply Voltage – 3V (+20%/–10%) Memory Speed – 100ns Flash memory and SRAM access time for VCC = 3V (+20%/–10%) – 90ns Flash memory and SRAM access time for VCC = 3.3V (+/–10%) s 256Kbits of SRAM (battery-backed) PLD with Macrocells – Over 3000 Gates of PLD: CPLD and DPLD – CPLD with 16 Output Macrocells (OMCs) and 24 Input Macrocells (IMCs) – DPLD - user defined internal chip select decoding Figure 1. 80-lead, Thin, Quad, Flat Package s Seven l/O Ports with 52 I/O pins: 52 individually configu...
STMicroelectronics
