SPC560P54L3 Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3 Device parison . . . . . . . . . . . . . . . . . .
SPC560P54L3 Key Features
- AEC-Q10x qualified
- 64 MHz, single issue, 32-bit CPU core plex (e200z0h)
- pliant with Power Architecture® embedded category
- Variable Length Encoding (VLE)
- Memory organization
- Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/pr
- Up to 80 KB on-chip SRAM with ECC
- Fail safe protection
- ECC protection on system SRAM and Flash
- Safety port