SPC56EC70B3 Datasheet | STMicroelectronics

Features - e200z4d, 32-bit Power Architecture® - Up to 120 MHz and 200 MIPs operation - e200z0h, 32-bit Power Architecture - Up to 80 MHz and 75 MIPs operation - Memory - Up to 3 MByte on-chip Flash with ECC - Up to 256 KByte on-chip SRAM with ECC - 64KByte on-chip Data Flash with ECC - 16-entry memory protection unit (MPU) - User selectable Memory BIST - Interrupts - 255 interrupt sources with 16 priority levels - Up to 54 ext. IRQ including 30 wake-up - GPIOs: from 147 (LQFP176) to 199 (LBGA256) - System timer units - 8-ch. 32-bit periodic interrupt timer (PIT) - 4-channel 32-bit system timer (STM) - Safety System Watchdog Timer (SWT) - Real-time clock timer (RTC/API) - e MIOS, 16-bit counter timed I/O units - Up...