APPLICATIONS
s s 8 BIT ARCHITECTURE CPU 22 K Bytes of USER ROM, SECTOR COMBINATIVE SYSTEM ROM 512 Bytes of RAM 2048 Bytes of EEPROM, SECTOR COMBINATIVE – Highly reliable CMOS EEPROM technology – 10 year data retention – 300,000 Erase/Write cycle endurance – Protected One Time Programmable block (32 or 64 bytes) – 1 to 32 bytes block either Erase or Write in single cycle programming Micromodule (D7) 4 4 4 4 s s s s s POWER SAVING STANDBY MODE VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH ERASE ESD PROTECTION GREATER THAN 5000V 2 OPERATING CONFIGURATIONS – ISSUER – USER Wafer s s CONTACTLESS SPECIFIC FEATURES
s COMPATIBLE WITH ISO 14443 TYPE B STANDARD s s s CONTACT SPECIFIC FEATURES
s EXTENDED VOLTAGE OPERATION, Vcc Range: 2.7V to 5.5V s s 13.56 MHZ CARRIER FREQUENCY 106 KBIT/S DATA TRANSFER AMPLITUDE MODULATION READER TO CARD LOAD MODULATION CARD TO READER 3V OPERATION SERIAL ACCESS, ISO 7816-3 COMPATIBLE UP TO 5 MHz INTERNAL OPERATING FREQUENCY CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 s s s October 1999 This is Brief Data from STMicroelectronics.
STMicroelectronics
