APPLICATIONS
DATA BRIEFING s s 8 BIT ARCHITECTURE CPU 32 K Bytes of USER ROM WITH PARTITIONING SYSTEM ROM FOR LIBRARIES 960 Bytes of RAM WITH PARTITIONING 8 K Bytes of EEPROM WITH PARTITIONING – Highly reliable CMOS EEPROM technology – 10 year data retention – 100,000 Erase/Write cycle endurance – Separate Write and Erase cycles for fast “1” programming – 1 to 64 bytes Erase or Program in 1 ms Micromodule (D7) 4 4 4 4 s s s s s SECURITY FIREWALLS FOR MEMORIES VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH PROGRAM 8 BIT TIMER HARDWARE DES ACCELERATOR SOFTWARE DES LIBRARY – DES, triple DES, DESX computations – CBC chaining mode Wafer s s s CONTACTLESS SPECIFIC FEATURES
s ISO 14443 TYPE B s 13.56 MHZ CARRIER FREQUENCY HARDWARE CRC CALCULATION 106, 212 and 424 KBIT/S DATA TRANSFER AMPLITUDE MODULATION READER TO CARD LOAD MODULATION CARD TO READER INTERFACE WITH RF READERS SUPPORTED THROUGH A LIBRARY OF EMBEDDED SOFTWARE FUNCTION COMPATIBLE WITH ISO 14443 STANDARD. CONTACT SPECIFIC FEAT...
STMicroelectronics
