STMicroelectronics ST1G3234B
The ST1G3234B is a dual supply low voltage CMOS 1-bit bus buffer level translator fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3 V bus and a 2.5 V or 1.8 V bus in a mixed 3.3 V/1.8 V, 3.3 V/2.5 V, 1.8 V/1.4 V and 2.5 V/1.8 V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation. The ST1G3234B is intended for one-way asynchronous communication between data buses.| Part No. | ST1G3234B |
|---|---|
| Datasheet | ST1G3234B Download |
| Manufacturer |  STMicroelectronics |
| Description | 1-bit dual supply bus buffer level translator |
| Buy | Stock & Price |
FEATURES
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● High speed: tPD = 4.0 ns (max.) at TA = 85 °C VCCB = 1.65 V; VCCA = 3.0 V Low power dissipation: ICCA = ICCB = 5 μA (max.) at TA = 85 °C Symmetrical output impedance: |IOHA| = IOLA = 10 mA min at VCCA = 2.75 V; VCCB = 1.4 to 3.6 V |IOHA| = IOLA = 6 mA min. at VCCA = 2.3 V; VCCB = 1.4 to 3.6 V Balanced propagation delays: tPLH ≅ tPHL Power-down protection on inputs and outputs 26 Ω series resistor on A-side outputs Operating voltage range: – VCCA (opr.) = 1.4 to 3.6 V – VCCB (opr.) = 1.4 to 3.6 V Allows partial power-down when VCCA = 0, device consumes very low quiescent current Max data rates: – 380 Mbps (1.8 to 3.3 V translation) – 260 Mbps (<1.8 to 3.3 V translation) – 260 Mbps (translates to 2.5 V) – 210 Mbps (translates to 1.5 V) Latch-up performance exceeds 500 mA (JESD 17) ESD performance: HBM > 2000 V (MIL STD 883 method 3015); MM > 200 V ROHS compliant to Flip-Chip package Flip-Chip 5
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DESCRIPTION
The input and output power-down protections disable the device when both power supply are down, so that the buses are effectively isolated.
