GENERAL DESCRIPTION
1.1 INTRODUCTION Under software control, the ST72T311 with 8 (ST72T311N) or 6 (ST72T311J) multiplexed may be placed in either Wait, Slow or Halt modes, analog inputs, industry standard synchronous SPI thus reducing power consumption. The enhanced and asynchronous SCI serial interfaces, digital instruction set and addressing modes afford real ) programming potential. In addition to standard t(s 8-bit data management, the ST72T311 features true bit manipulation, 8x8 unsigned multiplication c and indirect addressing modes on the whole memu ory. The device includes a low consumption and rod ) Figure 1. ST72T311 Block Diagram Watchdog, two independent 16-bit Timers, one featuring an External Clock Input, and both featuring Pulse Generator capabilities, 2 Input Captures and 2 Output Compares (only 1 Input Capture and 1 Output Compare on Timer A). solete Product(s OSCIN b P OSCOUT ) - O lete RESET Obsolleettee PPrroodduucctt((ss) - Obso PF0->PF2,4,6,7 (6 bits) Obso VDD OSC...