ST92186B Datasheet PDF

APPLICATIONS

WITH UP TO 32K ROM AND ENHANCED ON-SCREEN-DISPLAY Register file based 8/16 bit Core Architecture with RUN, WFI, and HALT modes s -10 to 70°C Operating Temperature Range s 24 MHz Operation @5V+-10% s Minimum instruction cycle time: 250ns at 16 MHz internal clock, 165ns at 24 MHz internal clock s 24 or 32 Kbytes ROM s 640 bytes of on-chip static RAM s 256 bytes of Register file s 256 bytes of display RAM (OSDRAM) s 32-pin Shrink DIP and 42-pin Shrink DIP packages s 26 (SDIP42) or 17 (SDIP32) fully programmable I/O pins s Flexible Clock controller for OSD and Core clocks, running from one single low frequency external crystal s Enhanced Display Controller with rows of up to 63 characters per row – 50/60Hz and 100/120 Hz operation – 525/625 lines operation, 4/3 or 16/9 format – Interlaced and progressive scanning – 18x26 or 9x13 character matrix – 256 (18x26) characters, 1024 (9x13) characters definable in ROM by user – 512 possible colors, in 4x16-entry palettes – 2 x 16-entr...