APPLICATIONS
WITH UP TO 96K ROM, ON-SCREEN-DISPLAY AND 1 OR 2 DATA SLICERS s Register file based 8/16 bit Core Architecture with RUN, WFI, and HALT modes s -10 to 75°C Operating Temperature Range s 24 MHz Operation @5 V ±10% s Min. instruction cycle time: 165 ns at 24 MHz s 32 - 96 Kbytes ROM, 1 - 3 Kbytes static RAM s 256 bytes of Register file s 384 bytes of display RAM (OSDRAM) s 56-pin Shrink DIP and TQFP64 packages s 37 fully programmable I/O pins s Flexible Clock controller for OSD, Data slicer and Core clocks, running from one single low frequency external crystal s Enhanced Display Controller with rows of up to 63 characters per row – 50/60Hz and 100/120 Hz operation – 525/625 lines operation, 4/3 or 16/9 format – interlaced and progressive scanning – 18x26 or 9x13 character matrix – 384 (18x26) characters, or 1536 (9x13) char- acters definable in ROM by user – 512 possible colors, in 4x16-entry palettes – 2 x 16-entry palettes for Foreground, and 2 x 16-entry palettes for Back...
STMicroelectronics
