STMicroelectronics STB10NB20
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronis has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVEABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR V GS ID ID I DM (● ) P tot dv/dt( 1) T s tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Peak Diode Recovery voltage slope Storage T emperature Max. O perating Junct ion T emperature o o o D2PAK TO-263 (suffix ”T4”) INTERNAL SCHEMATIC DIAGRAM Value 200 200 ± 30 10 6 40 85 0.68 5.5 -65 to 150 150 ( 1) ISD ≤ 10A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Unit V V V A A A W W /o C V/ns o o C C (●) Puls...