STMicroelectronics STB5NB80
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the INTERNAL SCHEMATIC DIAGRAM lowest RDS(on) per area, exceptional avalanche DataSheet4U.com and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING s DC-AC CONVERTERS FOR WELDING s EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVEABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR V GS ID ID I DM (● ) P tot dv/dt( 1) T s tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at T c = 25 oC Derating F actor Peak Diode Recovery voltage slope Storage T emperature Max. Operating Junction T emperature o o TYPICAL RDS(on) = 1.8 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL 3 1 DataShee Value 800 800 ± 30 5 3.2 20 110 0.88 4 -65 to 150 150 Unit V V...