STMicroelectronics STB6NB50
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE I2PAK TO-262 (suffix ”-1”) D2PAK TO-263 (Suffix ”T4”) INTERNAL SCHEMATIC DIAGRAMABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (● ) P tot dv/dt( 1 ) Ts tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature o o o Value 500 500 ± 30 5.8 3.7 23.2 100 0.8 4.5 -65 to 150 150 ( 1) ISD ≤ 6A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Un it V V V A A A W...