STMicroelectronics STD4NB25
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
ν SWITCH MODE POWER SUPPLIES (SMPS) ν DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE IPAK TO-251 (Suffix "-1") 3 3 2 1 DPAK TO-252 (Suffix "T4") 1 INTERNAL SCHEMATIC DIAGRAMABSOLUTE MAXIMUM RATINGS
Symbol V DS VDGR V GS ID ID I DM (● ) P tot dv/dt(1 ) T stg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 kΩ ) Gate-source Voltage Drain Current (continuous) at T c = 25 o C Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature o o Value 250 250 ± 30 4 2.5 16 40 0.32 5.5 -65 to 150 150 (1) ISD ≤4 Α , di/dt â 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Unit V V V A A A W W/ o C V/ns o o C C 1/6 (●) Pulse w...