Datasheet4U Logo Datasheet4U.com

STDVE103A - Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer

Description

The STDVE103A integrates a 4-channel 3.4 Gbps TMDS equalizer and a 3:1 switch to select one of the three HDMI ports.

The high-speed data paths and flow-through pinout minimize the internal device jitter and simplify the board layout.

The equalizer overcomes the jitter effects from lossy cables.

Features

  • Digital video signal equalizer with 3:1 HDMI switch.
  • Compatible with the high-definition multimedia interface (HDMI) v1.3 digital interface.
  • 340 MHz maximum clock speed operation supports all video formats with deep color at maximum refresh rates.
  • 3.4 Gbps data rate per channel.
  • Fully automatic adaptive equalizer for cable lengths up to 25 m.
  • Selectable 50 Ω input termination to VCC: 3.135 to 3.465 V.
  • Low speed control lines supply to VDD : 5 V (typ).
  • ESD.

📥 Download Datasheet

📁 Similar Datasheet

  • STD01N - Darlington Transistors (Sanken electric)
  • STD01P - Darlington Transistors (Sanken electric)
  • STD02N - Darlington Transistors (Sanken electric)
  • STD02P - Darlington Transistors (Sanken electric)
  • STD03205 - DC Solid State Relay (celduc-relais)
  • STD03505 - DC Solid State Relay (celduc-relais)
  • STD03L01 - N-Channel Logic Level Enhancement Mode Field Effect Transistor (SamHop Microelectronics)
  • STD03L07 - N-Channel Logic Level Enhancement Mode Field Effect Transistor (SamHop Microelectronics)
  • STD03N - Darlington Transistors (Allegro MicroSystems)
  • STD03N - Darlington Transistor (Sanken)
Other Datasheets by STMicroelectronics

Full PDF Text Transcription

Click to expand full text
STDVE103A Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer Preliminary Data Features ■ Digital video signal equalizer with 3:1 HDMI switch ■ Compatible with the high-definition multimedia interface (HDMI) v1.3 digital interface ■ 340 MHz maximum clock speed operation supports all video formats with deep color at maximum refresh rates ■ 3.4 Gbps data rate per channel ■ Fully automatic adaptive equalizer for cable lengths up to 25 m ■ Selectable 50 Ω input termination to VCC: 3.135 to 3.465 V ■ Low speed control lines supply to VDD : 5 V (typ) ■ ESD HBM model : > ±5 KV for all I/Os ■ Integrated open-drain I2C buffer for display data channel (DDC) ■ 5.
Published: |