STMicroelectronics STE38NB50F
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLY (SMPS) s DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVEABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR V GS ID ID I DM (● ) P tot dv/dt (1) T s tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Peak Diode Recovery voltage slope Storage T emperature Max. Operating Junction Temperature o o o ISOTOP INTERNAL SCHEMATIC DIAGRAM Value 500 500 ± 30 38 24 152 400 3.2 4.5 -65 to 150 150 ( 1) ISD ≤38 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Un it V V V A A A W W /o C V/ns o o C C 1/8 (●) Pulse width limited by s...