STMicroelectronics STE53NA50
N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR
APPLICATIONS
s SMPS & UPS s MOTOR CONTROL s WELDING EQUIPMENT s OUTPUT STAGE FOR PWM, ULTRASONIC CIRCUITS INTERNAL SCHEMATIC DIAGRAMABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (● ) P to t Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 o C Drain Current (pulsed) Total Dissipation at Tc = 25 C Derating Factor T st g Tj V ISO Storage Temperature Max. Operating Junction T emperature Insulation W ithhstand Voltage (AC-RMS) o o Value 500 500 ± 30 53 33 212 460 3.68 -55 to 150 150 2500 Unit V V V A A A W W/ o C o o C C V 1/7 (
●) Pulse width limited by safe operating area February 1998 STE53NA50 THERMAL DATA R t hj-ca se R thc -h Thermal Resistance Junction-case Thermal Resistance Case-heatsink W ith Conductive Grease Applied Max Max 0.27 0.05 o o C/W C/W AVALANCHE CHARACTERISTICS Symb ol I AR E AS Parameter Avalanche Current, Repetitive or Not-Re...