STM32H563RG Datasheet | STMicroelectronics

STM32H562xx and STM32H563xx Arm® Cortex®-M33 32-bit MCU + Trust Zone® + FPU, 375 DMIPS, 250 MHz, 2-Mbyte flash, 640-Kbyte RAM, math accelerators - production data Features Includes ST state-of-the-art patented technology Core - Arm® Cortex®-M33 CPU with Trust Zone®, FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1) ART Accelerator - 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories - 4-Kbyte data cache for external memories Benchmarks - 1.5 DMIPS/MHz (Drystone 2.1) - 1023 Core Mark® (4.092 Core Mark®/MHz) Memories - Up to 2 Mbytes of embedded flash memory with ECC, two banks read-while-write - Up to 48-Kbyte per bank with high-cycling capability (100 K cycles) for data flash - 2-Kbyte OTP (one-time programmable) - 640 Kbytes of SRAM (64-Kbyte SRAM2 with ECC and 320-Kbyte SRAM3 with flexible ECC) - 4 Kbytes of backup SRAM available in the lowest power modes - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories - One Octo-SPI memory interface with support for serial PSRAM/NAND/NOR, hyper RAM/flash frame formats - Two SD/SDIO/MMC interfaces LQFP64 (10 x 10 mm) LQFP100 14 x 14 mm) LQFP144 (20 x 20 mm) LQFP176 (24 x 24 mm) VFQFPN68 (8 x 8 mm) UFBGA WLCSP80 (3.50 X 3.27 mm) UFBGA169 (7 x 7 mm) UFBGA 176+25 (10 x 10 mm) Clock management - Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 k Hz...