STM8S207K4 Description
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STM8S207K4 Key Features
- Max fCPU: up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz
- Advanced STM8 core with Harvard architecture and 3-stage pipeline
- Extended instruction set
- Max 20 MIPS @ 24 MHz Memories
- Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
- Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles
- RAM: up to 6 Kbytes Clock, reset and supply management
- 2.95 to 5.5 V operating voltage
- Low power crystal resonator oscillator
- External clock input