STMicroelectronics STN1NB80
The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.DESCRIPTION
Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances.APPLICATIONS
SWITCH MODE POWER SUPPLIES (SMPS) s AC ADAPTORS AND BATTERY CHARGERS FOR HANDHELD EQUIPMENT s 2 SOT-223 INTERNAL SCHEMATIC DIAGRAMABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (● ) P tot Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 oC Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor dv/dt( 1 ) Ts tg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature o o Value 800 800 ± 30 0.2 0.12 0.8 2.9 0.02 4 -65 to 150 150 ( 1) ISD ≤ 0.2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Un it V V V A A A W W /o C V/ns o o C C (●) Pulse width limited by safe operating area November 1999 STN1NB80 THERMAL DATA R thj -cas...