STPMIC1CPQR Overview
The STPMIC1 is a fully integrated power management IC designed for products based on high integrated application processor designs requiring low power and high efficiency. The device integrates advanced low power.
STPMIC1CPQR Key Features
- Input voltage range from 2.8 V to 5.5 V
- 4 adjustable general purpose LDOs
- 1 LDO for DDR3 termination (sink-source), bypass mode for low power DDR or
- 1 LDO for USB PHY supply with automatic power source detection
- 1 reference voltage LDO for DDR memory
- 4 adjustable adaptive constant on-time (COT) buck SMPS converters
- 5.2 V / 1.1 A boost SMPS with bypass mode for 5 V input or battery input
- 1 power switch 500 mA USB OTG pliant
- 1 power switch 500 mA/1000 mA general purpose
- User programmable non-volatile memory (NVM), enabling scalability to support